1 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 pin function sin, sin differential serial data input d 0 ?d 3 parallel data input sout, sout differential serial data output clk, clk differential clock input cl/4, cl/4 differential 4 clock output cl/8, cl/8 differential 8 clock output mode conversion mode, 4-bit/8-bit sync conversion synchronizing input v cco v cc to output description features on-chip clock 4 and 8 extended 100e v ee range of ?.2v to ?.5v 1.6gb/s typical data rate capability differential clock and serial inputs vbb output for single-ended use asynchronous data synchronization mode select to expand to 8 bits internal 75k ? input pulldown resistors fully compatible with motorola mc10e/100e446 available in 28-pin plcc package 4-bit parallel-to-serial converter the sy10/100e446 are integrated 4-bit parallel-to- serial data converters. these devices are designed to operate for nrz data rates of up to a minimum of 1.3gb/ s. the chips generate a divide-by-4 and a divide-by-8 clock for both 4-bit conversion and a two-chip 8-bit conversion function. the conversion sequence was chosen to convert the parallel data into a serial stream from bit d 0 to d 3 . a serial input is provided to cascade two e446 devices for 8-bit conversion applications. the sync input will asynchronously reset the internal clock circuitry. this pin allows the user to reset the internal clock conversion unit and, thus, select the start of the conversion process. the mode input is used to select the conversion mode of the device. with the mode input low (or open) the device will function as a 4-bit converter. when the mode input is driven high, the internal load clock will change on every eighth clock cycle, thus allowing for an 8-bit conversion scheme using two e446s. when cascaded in an 8-bit conversion scheme, the devices will not operate at the 1.3gb/s data rate of a single device. refer to the applications section of this data sheet for more information on cascading the e446. for lower data rate applications, a v bb reference voltage is supplied for single-ended inputs. when operating at clock rates above 500mhz, differential input signals are recommended. for single-ended inputs, the v bb pin is tied to the inverting differential input and bypassed via a 0.01 f capacitor. the v bb provides the switching reference for the input differential amplifier. the v bb can also be used to ac couple an input signal. sy10e446 sy100e446 pin names rev.: f amendment: /0 issue date: march 2006
2 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 package/ordering information ordering information (1) package operating package lead part number type range marking finish sy10e446jc j28-1 commercial sy10e446jc sn-pb sy10e446jctr (2) j28-1 commercial sy10e446jc sn-pb sy100e446jc j28-1 commercial sy100e446jc sn-pb sy100e446jctr (2) j28-1 commercial sy100e446jc sn-pb sy10e446jz (3) j28-1 commercial sy10e446jz with matte-sn pb-free bar-line indicator pb-free sy10e446jztr (2, 3) j28-1 commercial sy10e446jz with matte-sn pb-free bar-line indicator pb-free SY100E446JZ (3) j28-1 commercial SY100E446JZ with matte-sn pb-free bar-line indicator pb-free SY100E446JZtr (2, 3) j28-1 commercial SY100E446JZ with matte-sn pb-free bar-line indicator pb-free notes: 1. contact factory for die availability. dice are guaranteed at t a = 25 c, dc electricals only. 2. tape and reel. 28-pin plcc (j28-1) 18 17 16 15 14 13 12 567891011 26 27 28 1 2 3 4 top view plcc j28-1 25 24 23 22 21 20 19 d 2 d 3 mode nc d 0 d 1 nc clk v bb v ee sin sync clk sin v cco cl/8 v cco cl/4 v cco cl/8 cl/4 nc nc v cc sout v cco nc sout
3 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 block diagram dq clk dq clk dq clk dq clk 0 1 sin sin d 3 0 1 0 1 0 1 d 2 d 1 d 0 sout sout 01 mode clk clk delay 4 r 8 r cl/8 cl/8 sync cl/4 cl/4 v bb
4 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 t a = 0 ct a = +25 ct a = +85 c symbol parameter min. typ. max. min. typ. max. min. typ. max. unit condition f max max. conversion frequency 1.3 1.6 1.3 1.6 1.3 1.6 gb/s nrz t pd propagation delay to output ps clk to sout 1000 1400 1700 1000 1400 1700 1000 1400 1700 clk to cl/4 500 800 1100 500 800 1100 500 800 1100 clk to cl/8 800 1100 1400 800 1100 1400 800 1100 1400 sync to cl/4, cl/8 500 800 1100 500 800 1100 500 800 1100 t s set-up time ps sin 200 400 200 400 200 400 d n 200 400 200 400 200 400 mode 0 250 0 250 0 250 t h hold time ps sin 750 550 750 550 750 550 d n 800 600 800 600 800 600 mode 500 300 500 300 500 300 t rr reset recovery time 500 200 500 200 500 200 ps t pw minimum pulse width 400 400 400 ps clk, mr t r rise/fall time ps 20 80% t f sout 100 225 350 100 225 350 100 225 350 other 200 425 650 200 425 650 200 425 650 ac electrical characteristics v ee = v ee (min.) to v ee (max.); v cc = v cco = gnd dc electrical characteristics v ee = v ee (min.) to v ee (max.); v cc = v cco = gnd t a = 0 ct a = +25 ct a = +85 c symbol parameter min. typ. max. min. typ. max. min. typ. max. unit condition i ih input high current 150 150 150 a v oh output high voltage v1 (sout only) 10e 1020 790 980 760 910 670 (sout only) 100e 1025 830 1025 830 1025 830 v bb output reference voltage v 10e 1.38 1.27 1.35 1.25 1.31 1.19 100e 1.38 1.26 1.38 1.26 1.38 1.26 i ee power supply current ma 10e 110 132 110 132 110 132 100e 110 132 110 132 127 152 note: 1. the maximum v oh limit was relaxed from standard ecl due to the high frequency output design. all other outputs are specified with the standar d 10e and 100e v oh levels. truth table mode conversion l 4-bit h 8-bit
5 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 timing diagrams clk reset d 0 d 1 d 2 d 3 sout cl/4 cl/8 d 0 1 d 1 1 d 2 1 d 3 1 timing diagram a. 4:1 parallel-to-serial conversion
6 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 timing diagrams (continued) timing diagram b. 8:1 parallel-to-serial conversion clk reset d 0 d 1 d 2 d 3 sout d 0 1 d 1 1 d 2 1 d 3 1 d 4 (d 0b ) d 4 1 d 5 1 d 6 1 d 7 1 d 5( d 1b ) d 6 (d 2b ) d 7( d 3b )
7 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 applications information the sy10e/100e446 are integrated 4:1 parallel-to-serial converters. the chips are designed to work with the e445 device to provide both transmission and receiving of a high- speed serial data path. the e446 can convert 4 bits of data into a 1.3gb/s nrz data stream. the device features a sync input which allows the user to reset the internal clock circuitry and restart the conversion sequence (see timing diagram a). note that sout is triggered by negative clock edges. the e446 features a differential serial input and internal divide-by-eight circuitry to facilitate the cascading of two devices to build an 8:1 multiplexer. figure 1 illustrates the architecture for an 8:1 multiplexer using two e446s (see timing diagram b). notice the serial outputs (sout) of the lower order converter feed the serial inputs of the higher order device. this feed through of the serial inputs bounds the upper end of the frequency of operation. the clock-to- serial output propagation delay, plus the set-up time of the serial input pins, must fit into a single clock period for the cascade architecture to function properly. using the worst case values for these two parameters from the data sheet, t pd clk to sout = 1600ps and t s for sin = 200ps, yields a minimum period of 1400ps or a clock frequency of 700mhz. the clock frequency is somewhat lower than that of a single converter. in order to increase this frequency, it is recommended that the clock edge feeding the e446a be delayed with respect to the e446b, as shown in figure 2. perhaps the easiest way to delay the second clock relative to the first is to take advantage of the differential clock inputs of the e446. by connecting the clock for e446a to the complimentary clock input pin, the device will clock a half a clock period after e446b (figure 2). utilizing this simple technique will raise the potential conversion frequency up to the maximum 1.3ghz of a stand-alone e446. figure 1. cascaded 8:1 converter architecture e446b sout sout d 3 d 2 d 1 d 0 d 7 d 6 d 5 d 4 e446a sout sout d 3 d 2 d 1 d 0 d 3 d 2 d 1 d 0 sin sin clk clk serial data parallel data 1400ps 200ps clk t pd clk to sout 1600ps
8 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 applications information figure 2. extended frequency 8:1 converter architecture e446b sout sout d 3 d 2 d 1 d 0 d 7 d 6 d 5 d 4 e446a sout sout d 3 d 2 d 1 d 0 d 3 d 2 d 1 d 0 sin sin clk clk serial data parallel data 770ps clkb clka t pd clk to sout 1.3ghz
9 sy10e446 sy100e446 micrel, inc. m9999-032206 hbwhelp@micrel.com or (408) 955-1690 28-pin plcc (j28-1) rev. 03 micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is a ssumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfu nction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intend ed for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant inj ury to the user. a purchaser s use or sale of micrel products for use in life support appliances, devices or systems is at purchaser s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2006 micrel, incorporated.
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